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ESP32

Params

Wi-Fi
- 802.11b/g/n up to 150Mbps
- 4 MAC interfaces
- AMPDU
Bluetooth
- Supports BR/EDR/LE
- Supports both Class 1 and Class 2 Transmitter
CPU
- Xtensa LX6 dual-core up to 400 DMIPS
- Up to 600 DMIPS under 1.2V core-voltage
- Code size 15% smaller
- 6 Interrupt levels
Internal Data RAM
- 500kB, 200kB for users
Flash
- 4MB Instruction space
- Configurable Mapping Table for OTA
Internal LDO for external Flash
- 1.8V/3.3V
- Supports power-down Flash during deep-sleep
SD/eMMC/SDIO Host
- Support
SPI Controller
- 4
GPIO
- 32
UART
- 2 with DMA
LED PWM
- Hardware support, 16-channel,
- 20-bit timers running at the 80 MHz clock
- 13-bit accuracy @ 1kHz
- 15-bit accuracy @ 250Hz
Motor PWM, Pluse-counter
- Hardware
Remote Control
- Hardware support
Timer
- Two 32-bit timers and two 64-bit timers
- One 48-bit-RTC timer
Watchdog
- Two system watchdogs and one RTC watch dog
ADC
- 16-channel, 12-bit
- Supports Low Noise Analog Amplifier
DAC
- 2-channel, 10-bit
32k Crystal
- Support for sleep modes
Touch sensor
- Support, 10-channel
Temperature sensor
- Support
Flash Encrypt
- Hardware support
E-fuse
- 1kB, customer writeable, including four MAC addresses.
AES
- Supports AES-128, AES-192 and AES-256 of the standard FIPS PUB 197.
SHA
- Supports SHA-1, SHA-256, SHA-384 and SHA-512 of the standard FIPS PUB 180-4.
RSA
- Supports 512-bit to 4096-bit RSA encryption
Recovery memory in RTC
- 8 kBytes, instruction executable.
ULP-coprocessor
- Supports monitoring sensors in deep sleep.